The present application relates to semiconductor technology. More particularly, the present application relates to a semiconductor structure containing a strained germanium layer and a relaxed silicon germanium alloy fin that can be used collectively as a high hole mobility channel material for p-type fin field effect transistors (e.g., p-FinFETs) and a method of forming the same.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, fin field effect transistors (FinFETs) is the next step in the evolution of complementary metal oxide semiconductor (CMOS) devices. Fin field effect transistors (FinFETs) can achieve higher drive currents with increasingly smaller dimensions as compared to conventional planar FETs. As scaling continues, further improvements over conventional FinFETs are required. For example, there is a need to provide channel materials for FinFET devices that can ensure continued increase in device performance with ever shrinking dimensions.